0
Q:

The 2 types of noise that the analog systems face during signal processing are:

A) Device electronic noise and environmental noise B) Noise due to Vibration and electronic noise
C) Passive and active noise D) None of the mentioned
 
Answer & Explanation Answer: A) Device electronic noise and environmental noise

Explanation: Device electronic noise and environmental noise affects signal processing of analog signals.

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

45
Q:

Noise generated by independent devices are:

A) Correlated B) Uncorrelated
C) Equal D) None of the mentioned
 
Answer & Explanation Answer: B) Uncorrelated

Explanation: Noise generated by independent devices are uncorrelated, eg: noise generated from resistor is not similar to noise generated from transistor.

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

129
Q:

In probability Noise is described as:

A) Random function B) Random process
C) Deterministic function D) Deterministic process
 
Answer & Explanation Answer: B) Random process

Explanation: Noise is a Random Process.

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

129
Q:

Noise in VLSI circuits mean:

A) Unwanted signals that arise due to vibration in the passive circuits B) Unknown signal that limits the minimum signal level that a circuit can process with acceptable quality
C) Signal which undergoes distortion D) All of the mentioned
 
Answer & Explanation Answer: B) Unknown signal that limits the minimum signal level that a circuit can process with acceptable quality

Explanation: In VLSI circuits noise limits the minimum signal level that a circuit process with acceptable quality.

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

76
Q:

Noise margin of CMOS is:

A) Better than TTL and ECL B) Less than TTL and ECL
C) Equal to TTL and ECL D) None of the Mentioned
 
Answer & Explanation Answer: A) Better than TTL and ECL

Explanation: Not available for this question

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

53
Q:

If VIH of the 2nd gate is higher than VOH of the 1st gate, then logic output 0 from the 1st gate is considered as:

A) Logic input 1 B) Uncertain
C) Logic input 0 D) None of the mentioned
 
Answer & Explanation Answer: B) Uncertain

Explanation: The level of output signal from 1st gate is higher than the range for low input at 2nd gate. So it is uncertain.

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

104
Q:

Input Voltage between VIL and VOL is considered as:

A) Logic Input 1 B) Logic Input 0
C) Uncertain D) None of the mentioned
 
Answer & Explanation Answer: B) Logic Input 0

Explanation: Not available for this question

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

99
Q:

If VIL of the 2nd gate is lower than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as:

A) Logic input 1 B) Uncertain
C) Logic input 0 D) None of the mentioned
 
Answer & Explanation Answer: B) Uncertain

Explanation: The level of output signal from 1st gate is higher than the range for low input at 2nd gate. So it is uncertain.

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Category: Electronics & Electrical MCQs
Sub Category: VLSI Mcqs

137